The present invention relates to a method and system for simulating hardware circuits, in particular useful for Silicon-On-Insulator (SOI) type hardware circuits.
It is a general requirement for a computer circuit designer that any kind of computer hardware circuit has to be simulated in order to check for general correctness of circuit structure and function properties, as well as for particularities like, for example, signal propagation times, etc. Thus, over the years of hardware development, many simulation methods have been developed in order to guarantee a high quality of the hardware.
A new technical area of hardware circuit development has now been entered to be explored: SOI-type hardware.
In contrast to conventional CMOS-type hardware, SOI-type hardware states, e.g., the voltages occurring at any node of a circuit, are dependent of the history during which the hardware has been operated. This history-dependent behavior implies a need to apply new simulation and testing methods which are not known from other experience from any type of hardware development. Thus, in SOI, there is a particular interest to test and simulate, i.e., explore hardware states developing after a large number of so-called ‘functional cycles’. A functional cycle can be assumed to represent a defined operating interval having a start time and a stop time in which, at both times, the input voltages are the same. A functional cycle may comprise one machine cycle or a plurality of them.
In a computer, many circuits operate in step with the machine cycle. Clock circuits for example do the same operations over and over again. Other circuits typically do not the same thing in each cycle, but they also have to operate reliably under cyclic conditions.
For non-SOI technologies (e.g., conventional CMOS technology), cyclic operating conditions usually do not represent a particular worst case for circuit performance or functionality. Therefore, in the past, not much effort was spent to investigate cyclic operation.
The need for circuit simulation under cyclic operating conditions has significantly increased with the use of partially-depleted SOI technology. With partially-depleted SOI, floating FET bodies cause the so-called “floating body effect” which is a so-called “history effect”:
The floating FET bodies need a very long time compared to one operation cycle to adjust to sudden changes in circuit operation, i.e. they “remember” the mode of circuit operation before the change. The state of the body affects the threshold voltage of the FET, and thereby also the switching performance of the circuit. As a result, a circuit behaves differently if it has just been switched on compared to its behavior under prolonged cyclic operation. Therefore, cyclic operating conditions have to be investigated and simulated for circuits in SOI technology.
This phenomenon is accompanied with a further specific, but independent phenomenon which also shows a “history effect”. Specifically, in SOI technology, there is a need to investigate circuitry for self-heating because transistors are thermally isolated by the insulator on which they sit. The temperature of a transistor at a given point in time depends on previous switching “history” of the transistor. For obvious reasons, a cyclically operated circuit produces much more self-heating than a circuit which switches only occasionally.
A conventional simulation of such cyclic operation requires the simulation of several thousands of circuit cycles until a steady state of the hardware is approached. Iterative simulation methods are much more efficient, but such methods can also fail or give wrong results if the circuit simulation is not compatible with cyclic operating conditions. Generally, such circuit simulation may require considerable computer resources even if iterative solution methods are used. Errors in the cyclic operating conditions caused by other reasons than the floating-body-effect or by self-heating can lead to convergence problems resulting in excessive computer run times for the simulation. Such simulations often done done in vain, e.g., they may lead to erroneous results or no result at all after several iterations.
There is therefore a need for an improved simulation method and system, in particular for history-dependent and cyclic operation-sensitive hardware circuits, like SOI-type hardware, for example.